linux-postmarketos-stericsson: use proper patch for Hydis display ghosting (MR 5573)

The previous patch just reverted an older commit. This actually fixes the problem properly and will likely be merged upstream. [ci:skip-build]: already built successfully in CI

linux-postmarketos-stericsson: use proper patch for Hydis display ghosting (MR 5573)
fcbd9f03 · Newbyte · Pablo Correa Gomez · 0760367e · 0760367e · fcbd9f03
Unverified Commit fcbd9f03 authored 6 months ago by Newbyte Committed by Pablo Correa Gomez 6 months ago
--- a/device/testing/linux-postmarketos-stericsson/0001-Revert-drm-panel-nt35510-support-FRIDA-FRD400B25025-.patch
+++ b/device/testing/linux-postmarketos-stericsson/0001-Revert-drm-panel-nt35510-support-FRIDA-FRD400B25025-.patch
-From fa77f847174e39534627842541d666cfc2d4189d Mon Sep 17 00:00:00 2001
-From: Stefan Hansson <newbyte@postmarketos.org>
-Date: Fri, 6 Sep 2024 12:42:58 +0200
-Subject: [PATCH] Revert "drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK"
-
-This reverts commit 219a1f49094f50bf9c382830d06149e677f76bed.
---
- drivers/gpu/drm/panel/panel-novatek-nt35510.c | 284 ++----------------
- 1 file changed, 32 insertions(+), 252 deletions(-)
-
-diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
-index d3bfdfc9cff6..3ecaf87939e6 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
-+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
-@@ -36,9 +36,6 @@
- #include <drm/drm_modes.h>
- #include <drm/drm_panel.h>
- 
-#define NT35510_CMD_CORRECT_GAMMA BIT(0)
-#define NT35510_CMD_CONTROL_DISPLAY BIT(1)
-
- #define MCS_CMD_MAUCCTR		0xF0 /* Manufacturer command enable */
- #define MCS_CMD_READ_ID1	0xDA
- #define MCS_CMD_READ_ID2	0xDB
-@@ -115,33 +112,18 @@
- /* AVDD and AVEE setting 3 bytes */
- #define NT35510_P1_AVDD_LEN 3
- #define NT35510_P1_AVEE_LEN 3
-#define NT35510_P1_VCL_LEN 3
- #define NT35510_P1_VGH_LEN 3
- #define NT35510_P1_VGL_LEN 3
- #define NT35510_P1_VGP_LEN 3
- #define NT35510_P1_VGN_LEN 3
-#define NT35510_P1_VCMOFF_LEN 2
- /* BT1CTR thru BT5CTR setting 3 bytes */
- #define NT35510_P1_BT1CTR_LEN 3
- #define NT35510_P1_BT2CTR_LEN 3
-#define NT35510_P1_BT3CTR_LEN 3
- #define NT35510_P1_BT4CTR_LEN 3
- #define NT35510_P1_BT5CTR_LEN 3
- /* 52 gamma parameters times two per color: positive and negative */
- #define NT35510_P1_GAMMA_LEN 52
- 
-#define NT35510_WRCTRLD_BCTRL BIT(5)
-#define NT35510_WRCTRLD_A BIT(4)
-#define NT35510_WRCTRLD_DD BIT(3)
-#define NT35510_WRCTRLD_BL BIT(2)
-#define NT35510_WRCTRLD_DB BIT(1)
-#define NT35510_WRCTRLD_G BIT(0)
-
-#define NT35510_WRCABC_OFF 0
-#define NT35510_WRCABC_UI_MODE 1
-#define NT35510_WRCABC_STILL_MODE 2
-#define NT35510_WRCABC_MOVING_MODE 3
-
- /**
-  * struct nt35510_config - the display-specific NT35510 configuration
-  *
-@@ -193,10 +175,6 @@ struct nt35510_config {
- 	 * @mode_flags: DSI operation mode related flags
- 	 */
- 	unsigned long mode_flags;
-	/**
-	 * @cmds: enable DSI commands
-	 */
-	u32 cmds;
- 	/**
- 	 * @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
- 	 * in 0.1V steps the default is 0x05 which means 6.0V
-@@ -246,25 +224,6 @@ struct nt35510_config {
- 	 * The defaults are 4 and 3 yielding 0x34
- 	 */
- 	u8 bt2ctr[NT35510_P1_BT2CTR_LEN];
-	/**
-	 * @vcl: setting for VCL ranging from 0x00 = -2.5V to 0x11 = -4.0V
-	 * in 1V steps, the default is 0x00 which means -2.5V
-	 */
-	u8 vcl[NT35510_P1_VCL_LEN];
-	/**
-	 * @bt3ctr: setting for boost power control for the VCL step-up
-	 * circuit (3)
-	 * bits 0..2 in the lower nibble controls CLCK, the booster clock
-	 * frequency, the values are the same as for PCK in @bt1ctr.
-	 * bits 4..5 in the upper nibble controls BTCL, the boosting
-	 * amplification for the step-up circuit.
-	 * 0 = Disable
-	 * 1 = -0.5 x VDDB
-	 * 2 = -1 x VDDB
-	 * 3 = -2 x VDDB
-	 * The defaults are 4 and 2 yielding 0x24
-	 */
-	u8 bt3ctr[NT35510_P1_BT3CTR_LEN];
- 	/**
- 	 * @vgh: setting for VGH ranging from 0x00 = 7.0V to 0x0B = 18.0V
- 	 * in 1V steps, the default is 0x08 which means 15V
-@@ -318,19 +277,6 @@ struct nt35510_config {
- 	 * same layout of bytes as @vgp.
- 	 */
- 	u8 vgn[NT35510_P1_VGN_LEN];
-	/**
-	 * @vcmoff: setting the DC VCOM offset voltage
-	 * The first byte contains bit 8 of VCM in bit 0 and VCMOFFSEL in bit 4.
-	 * The second byte contains bits 0..7 of VCM.
-	 * VCMOFFSEL the common voltage offset mode.
-	 * VCMOFFSEL 0x00 = VCOM .. 0x01 Gamma.
-	 * The default is 0x00.
-	 * VCM the VCOM output voltage (VCMOFFSEL = 0) or the internal register
-	 * offset for gamma voltage (VCMOFFSEL = 1).
-	 * VCM 0x00 = 0V/0 .. 0x118 = 3.5V/280 in steps of 12.5mV/1step
-	 * The default is 0x00 = 0V/0.
-	 */
-	u8 vcmoff[NT35510_P1_VCMOFF_LEN];
- 	/**
- 	 * @dopctr: setting optional control for display
- 	 * ERR bits 0..1 in the first byte is the ERR pin output signal setting.
-@@ -495,43 +441,6 @@ struct nt35510_config {
- 	 * @gamma_corr_neg_b: Blue gamma correction parameters, negative
- 	 */
- 	u8 gamma_corr_neg_b[NT35510_P1_GAMMA_LEN];
-	/**
-	 * @wrdisbv: write display brightness
-	 * 0x00 value means the lowest brightness and 0xff value means
-	 * the highest brightness.
-	 * The default is 0x00.
-	 */
-	u8 wrdisbv;
-	/**
-	 * @wrctrld: write control display
-	 * G bit 0 selects gamma curve: 0 = Manual, 1 = Automatic
-	 * DB bit 1 selects display brightness: 0 = Manual, 1 = Automatic
-	 * BL bit 2 controls backlight control: 0 = Off, 1 = On
-	 * DD bit 3 controls display dimming: 0 = Off, 1 = On
-	 * A bit 4 controls LABC block: 0 = Off, 1 = On
-	 * BCTRL bit 5 controls brightness block: 0 = Off, 1 = On
-	 */
-	u8 wrctrld;
-	/**
-	 * @wrcabc: write content adaptive brightness control
-	 * There is possible to use 4 different modes for content adaptive
-	 * image functionality:
-	 * 0: Off
-	 * 1: User Interface Image (UI-Mode)
-	 * 2: Still Picture Image (Still-Mode)
-	 * 3: Moving Picture Image (Moving-Mode)
-	 * The default is 0
-	 */
-	u8 wrcabc;
-	/**
-	 * @wrcabcmb: write CABC minimum brightness
-	 * Set the minimum brightness value of the display for CABC
-	 * function.
-	 * 0x00 value means the lowest brightness for CABC and 0xff
-	 * value means the highest brightness for CABC.
-	 * The default is 0x00.
-	 */
-	u8 wrcabcmb;
- };
- 
- /**
-@@ -675,16 +584,6 @@ static int nt35510_setup_power(struct nt35510 *nt)
- 				nt->conf->bt2ctr);
- 	if (ret)
- 		return ret;
-	ret = nt35510_send_long(nt, dsi, NT35510_P1_SETVCL,
-				NT35510_P1_VCL_LEN,
-				nt->conf->vcl);
-	if (ret)
-		return ret;
-	ret = nt35510_send_long(nt, dsi, NT35510_P1_BT3CTR,
-				NT35510_P1_BT3CTR_LEN,
-				nt->conf->bt3ctr);
-	if (ret)
-		return ret;
- 	ret = nt35510_send_long(nt, dsi, NT35510_P1_SETVGH,
- 				NT35510_P1_VGH_LEN,
- 				nt->conf->vgh);
-@@ -721,12 +620,6 @@ static int nt35510_setup_power(struct nt35510 *nt)
- 	if (ret)
- 		return ret;
- 
-	ret = nt35510_send_long(nt, dsi, NT35510_P1_SETVCMOFF,
-				NT35510_P1_VCMOFF_LEN,
-				nt->conf->vcmoff);
-	if (ret)
-		return ret;
-
- 	/* Typically 10 ms */
- 	usleep_range(10000, 20000);
- 
-@@ -906,38 +799,36 @@ static int nt35510_power_on(struct nt35510 *nt)
- 	if (ret)
- 		return ret;
- 
-	if (nt->conf->cmds & NT35510_CMD_CORRECT_GAMMA) {
-		ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_RED_POS,
-					NT35510_P1_GAMMA_LEN,
-					nt->conf->gamma_corr_pos_r);
-		if (ret)
-			return ret;
-		ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_GREEN_POS,
-					NT35510_P1_GAMMA_LEN,
-					nt->conf->gamma_corr_pos_g);
-		if (ret)
-			return ret;
-		ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_BLUE_POS,
-					NT35510_P1_GAMMA_LEN,
-					nt->conf->gamma_corr_pos_b);
-		if (ret)
-			return ret;
-		ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_RED_NEG,
-					NT35510_P1_GAMMA_LEN,
-					nt->conf->gamma_corr_neg_r);
-		if (ret)
-			return ret;
-		ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_GREEN_NEG,
-					NT35510_P1_GAMMA_LEN,
-					nt->conf->gamma_corr_neg_g);
-		if (ret)
-			return ret;
-		ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_BLUE_NEG,
-					NT35510_P1_GAMMA_LEN,
-					nt->conf->gamma_corr_neg_b);
-		if (ret)
-			return ret;
-	}
-+	ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_RED_POS,
-+				NT35510_P1_GAMMA_LEN,
-+				nt->conf->gamma_corr_pos_r);
-+	if (ret)
-+		return ret;
-+	ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_GREEN_POS,
-+				NT35510_P1_GAMMA_LEN,
-+				nt->conf->gamma_corr_pos_g);
-+	if (ret)
-+		return ret;
-+	ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_BLUE_POS,
-+				NT35510_P1_GAMMA_LEN,
-+				nt->conf->gamma_corr_pos_b);
-+	if (ret)
-+		return ret;
-+	ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_RED_NEG,
-+				NT35510_P1_GAMMA_LEN,
-+				nt->conf->gamma_corr_neg_r);
-+	if (ret)
-+		return ret;
-+	ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_GREEN_NEG,
-+				NT35510_P1_GAMMA_LEN,
-+				nt->conf->gamma_corr_neg_g);
-+	if (ret)
-+		return ret;
-+	ret = nt35510_send_long(nt, dsi, NT35510_P1_SET_GAMMA_BLUE_NEG,
-+				NT35510_P1_GAMMA_LEN,
-+				nt->conf->gamma_corr_neg_b);
-+	if (ret)
-+		return ret;
- 
- 	/* Set up stuff in  manufacturer control, page 0 */
- 	ret = nt35510_send_long(nt, dsi, MCS_CMD_MAUCCTR,
-@@ -1016,26 +907,6 @@ static int nt35510_prepare(struct drm_panel *panel)
- 	/* Up to 120 ms */
- 	usleep_range(120000, 150000);
- 
-	if (nt->conf->cmds & NT35510_CMD_CONTROL_DISPLAY) {
-		ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY,
-					 &nt->conf->wrctrld,
-					 sizeof(nt->conf->wrctrld));
-		if (ret < 0)
-			return ret;
-
-		ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_POWER_SAVE,
-					 &nt->conf->wrcabc,
-					 sizeof(nt->conf->wrcabc));
-		if (ret < 0)
-			return ret;
-
-		ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS,
-					 &nt->conf->wrcabcmb,
-					 sizeof(nt->conf->wrcabcmb));
-		if (ret < 0)
-			return ret;
-	}
-
- 	ret = mipi_dsi_dcs_set_display_on(dsi);
- 	if (ret) {
- 		dev_err(nt->dev, "failed to turn display on (%d)\n", ret);
-@@ -1133,7 +1004,7 @@ static int nt35510_probe(struct mipi_dsi_device *dsi)
- 	if (ret)
- 		return ret;
- 
-	nt->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
-+	nt->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS);
- 	if (IS_ERR(nt->reset_gpio)) {
- 		dev_err(dev, "error getting RESET GPIO\n");
- 		return PTR_ERR(nt->reset_gpio);
-@@ -1162,10 +1033,7 @@ static int nt35510_probe(struct mipi_dsi_device *dsi)
- 			return PTR_ERR(bl);
- 		}
- 		bl->props.max_brightness = 255;
-		if (nt->conf->cmds & NT35510_CMD_CONTROL_DISPLAY)
-			bl->props.brightness = nt->conf->wrdisbv;
-		else
-			bl->props.brightness = 255;
-+		bl->props.brightness = 255;
- 		bl->props.power = FB_BLANK_POWERDOWN;
- 		nt->panel.backlight = bl;
- 	}
-@@ -1244,7 +1112,6 @@ static const struct nt35510_config nt35510_hydis_hva40wv1 = {
- 		.flags = 0,
- 	},
- 	.mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS,
-	.cmds = NT35510_CMD_CORRECT_GAMMA,
- 	/* 0x09: AVDD = 5.6V */
- 	.avdd = { 0x09, 0x09, 0x09 },
- 	/* 0x34: PCK = Hsync/2, BTP = 2 x VDDB */
-@@ -1253,10 +1120,6 @@ static const struct nt35510_config nt35510_hydis_hva40wv1 = {
- 	.avee = { 0x09, 0x09, 0x09 },
- 	/* 0x24: NCK = Hsync/2, BTN =  -2 x VDDB */
- 	.bt2ctr = { 0x24, 0x24, 0x24 },
-	/* VBCLA: -2.5V, VBCLB: -2.5V, VBCLC: -2.5V */
-	.vcl = { 0x00, 0x00, 0x00 },
-	/* 0x24: CLCK = Hsync/2, BTN =  -1 x VDDB */
-	.bt3ctr = { 0x24, 0x24, 0x24 },
- 	/* 0x05 = 12V */
- 	.vgh = { 0x05, 0x05, 0x05 },
- 	/* 0x24: NCKA = Hsync/2, VGH = 2 x AVDD - AVEE */
-@@ -1269,8 +1132,6 @@ static const struct nt35510_config nt35510_hydis_hva40wv1 = {
- 	.vgp = { 0x00, 0xA3, 0x00 },
- 	/* VGMP: 0x0A3 = 5.0375V, VGSP = 0V */
- 	.vgn = { 0x00, 0xA3, 0x00 },
-	/* VCMOFFSEL = VCOM voltage offset mode, VCM = 0V */
-	.vcmoff = { 0x00, 0x00 },
- 	/* Enable TE, EoTP and RGB pixel format */
- 	.dopctr = { NT35510_DOPCTR_0_DSITE | NT35510_DOPCTR_0_EOTP |
- 		    NT35510_DOPCTR_0_N565, NT35510_DOPCTR_1_CTB },
-@@ -1302,88 +1163,7 @@ static const struct nt35510_config nt35510_hydis_hva40wv1 = {
- 	.gamma_corr_neg_b = { NT35510_GAMMA_NEG_DEFAULT },
- };
- 
-static const struct nt35510_config nt35510_frida_frd400b25025 = {
-	.width_mm = 52,
-	.height_mm = 86,
-	.mode = {
-		.clock = 23000,
-		.hdisplay = 480,
-		.hsync_start = 480 + 34, /* HFP = 34 */
-		.hsync_end = 480 + 34 + 2, /* HSync = 2 */
-		.htotal = 480 + 34 + 2 + 34, /* HBP = 34 */
-		.vdisplay = 800,
-		.vsync_start = 800 + 15, /* VFP = 15 */
-		.vsync_end = 800 + 15 + 12, /* VSync = 12 */
-		.vtotal = 800 + 15 + 12 + 15, /* VBP = 15 */
-		.flags = 0,
-	},
-	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-			MIPI_DSI_MODE_LPM,
-	.cmds = NT35510_CMD_CONTROL_DISPLAY,
-	/* 0x03: AVDD = 6.2V */
-	.avdd = { 0x03, 0x03, 0x03 },
-	/* 0x46: PCK = 2 x Hsync, BTP = 2.5 x VDDB */
-	.bt1ctr = { 0x46, 0x46, 0x46 },
-	/* 0x03: AVEE = -6.2V */
-	.avee = { 0x03, 0x03, 0x03 },
-	/* 0x36: PCK = 2 x Hsync, BTP =  2 x VDDB */
-	.bt2ctr = { 0x36, 0x36, 0x36 },
-	/* VBCLA: -2.5V, VBCLB: -2.5V, VBCLC: -3.5V */
-	.vcl = { 0x00, 0x00, 0x02 },
-	/* 0x26: CLCK = 2 x Hsync, BTN =  -1 x VDDB */
-	.bt3ctr = { 0x26, 0x26, 0x26 },
-	/* 0x09 = 16V */
-	.vgh = { 0x09, 0x09, 0x09 },
-	/* 0x36: HCK = 2 x Hsync, VGH = 2 x AVDD - AVEE */
-	.bt4ctr = { 0x36, 0x36, 0x36 },
-	/* 0x08 = -10V */
-	.vgl = { 0x08, 0x08, 0x08 },
-	/* 0x26: LCK = 2 x Hsync, VGL = AVDD + VCL - AVDD */
-	.bt5ctr = { 0x26, 0x26, 0x26 },
-	/* VGMP: 0x080 = 4.6V, VGSP = 0V */
-	.vgp = { 0x00, 0x80, 0x00 },
-	/* VGMP: 0x080 = 4.6V, VGSP = 0V */
-	.vgn = { 0x00, 0x80, 0x00 },
-	/* VCMOFFSEL = VCOM voltage offset mode, VCM = -1V */
-	.vcmoff = { 0x00, 0x50 },
-	.dopctr = { NT35510_DOPCTR_0_RAMKP | NT35510_DOPCTR_0_DSITE |
-		NT35510_DOPCTR_0_DSIG | NT35510_DOPCTR_0_DSIM |
-		NT35510_DOPCTR_0_EOTP | NT35510_DOPCTR_0_N565, 0 },
-	.madctl = NT35510_ROTATE_180_SETTING,
-	/* 0x03: SDT = 1.5 us */
-	.sdhdtctr = 0x03,
-	/* EQ control for gate signals, 0x00 = 0 us */
-	.gseqctr = { 0x00, 0x00 },
-	/* SDEQCTR: source driver EQ mode 2, 1 us rise time on each step */
-	.sdeqctr = { 0x01, 0x02, 0x02, 0x02 },
-	/* SDVPCTR: Normal operation off color during v porch */
-	.sdvpctr = 0x01,
-	/* T1: number of pixel clocks on one scanline: 0x184 = 389 clocks */
-	.t1 = 0x0184,
-	/* VBP: vertical back porch toward the panel */
-	.vbp = 0x1C,
-	/* VFP: vertical front porch toward the panel */
-	.vfp = 0x1C,
-	/* PSEL: divide pixel clock 23MHz with 1 (no clock downscaling) */
-	.psel = 0,
-	/* DPTMCTR12: 0x03: LVGL = VGLX, overlap mode, swap R->L O->E */
-	.dpmctr12 = { 0x03, 0x00, 0x00, },
-	/* write display brightness */
-	.wrdisbv = 0x7f,
-	/* write control display */
-	.wrctrld = NT35510_WRCTRLD_BCTRL | NT35510_WRCTRLD_DD |
-			NT35510_WRCTRLD_BL,
-	/* write content adaptive brightness control */
-	.wrcabc = NT35510_WRCABC_STILL_MODE,
-	/* write CABC minimum brightness */
-	.wrcabcmb = 0xff,
-};
-
- static const struct of_device_id nt35510_of_match[] = {
-	{
-		.compatible = "frida,frd400b25025",
-		.data = &nt35510_frida_frd400b25025,
-	},
- 	{
- 		.compatible = "hydis,hva40wv1",
- 		.data = &nt35510_hydis_hva40wv1,
-- 
-2.46.0
-
--- a/device/testing/linux-postmarketos-stericsson/APKBUILD
+++ b/device/testing/linux-postmarketos-stericsson/APKBUILD
@@ -5,7 +5,7 @@ _flavor="postmarketos-stericsson"
 _config="config-$_flavor.armv7"
 pkgname=linux-$_flavor
 pkgver=6.10.8
-pkgrel=0
+pkgrel=1
 pkgdesc="Mainline kernel for ST-Ericsson NovaThor devices"
 arch="armv7"
 _carch="arm"
@@ -38,7 +38,7 @@ source="
 	https://cdn.kernel.org/pub/linux/kernel/v${_kernver%%.*}.x/linux-$_kernver.tar.xz
 	config-$_flavor.armv7

-	0001-Revert-drm-panel-nt35510-support-FRIDA-FRD400B25025-.patch
+	make-new-commands-optional.patch
 	"
 builddir="$srcdir/linux-${_kernver//_/-}"

@@ -69,5 +69,5 @@ package() {
 sha512sums="
 0829f6963a91cd230e33fa82605ff0b5b1b7c6f21192634f94a60185926c9b2eb12f3124693753c7da33cb6b15abe9146ec343c9bf7307156dd63c2fbc585f13  linux-6.10.8.tar.xz
 dce1235801a3bafdb9085cb4c37cfda78d0e1b43cd81287163fe866c1e976e51002b7d2ee9b74c96664eb8aa737a59241d7decb599c7935fcdedc9ae3c6d9ac3  config-postmarketos-stericsson.armv7
-d1eed5b2ee95638a6fa5ba2995502d0a8d43d9ed22224b4b2fee7a4dfe74f16fcf200a60eb679c0b9a79e9b8408b96a0eba9b7caa8f87f427b37c4139657a9d2  0001-Revert-drm-panel-nt35510-support-FRIDA-FRD400B25025-.patch
+9e474877e43f26b389c63436fdad2009fb80afd753fffe88104d8cfab67d97c65d8af08420d1739301461db3b03af3bb9fb5c40a691a675e9ab551fdd35724aa  make-new-commands-optional.patch
 "
--- a/device/testing/linux-postmarketos-stericsson/make-new-commands-optional.patch
+++ b/device/testing/linux-postmarketos-stericsson/make-new-commands-optional.patch
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Sun, 08 Sep 2024 23:50:30 +0200
+Subject: [PATCH v2] drm/panel: nt35510: Make new commands optional
+
+The commit introducing the Frida display started to write the
+SETVCMOFF registers unconditionally, and some (not all!) Hydis
+display seem to be affected by ghosting after the commit.
+
+Make SETVCMOFF optional and only send these commands on the
+Frida display for now.
+
+Reported-by: Stefan Hansson <newbyte@postmarketos.org>
+Fixes: 219a1f49094f ("drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK")
+Acked-by: Jessica Zhang <quic_jesszhan@quicinc.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+Changes in v2:
+- After Stefan's testing conclude that we only need to make
+  SETVCMOFF optional.
+- Link to v1: https://lore.kernel.org/r/20240906-fix-nt35510-v1-1-1971f3af7dda@linaro.org
+---
+ drivers/gpu/drm/panel/panel-novatek-nt35510.c | 18 ++++++++++++------
+ 1 file changed, 12 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+index d3bfdfc9cff6..a3460ed38cc4 100644
+--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+@@ -38,6 +38,7 @@
+ 
+ #define NT35510_CMD_CORRECT_GAMMA BIT(0)
+ #define NT35510_CMD_CONTROL_DISPLAY BIT(1)
+#define NT35510_CMD_SETVCMOFF BIT(2)
+ 
+ #define MCS_CMD_MAUCCTR		0xF0 /* Manufacturer command enable */
+ #define MCS_CMD_READ_ID1	0xDA
+@@ -675,16 +676,19 @@ static int nt35510_setup_power(struct nt35510 *nt)
+ 				nt->conf->bt2ctr);
+ 	if (ret)
+ 		return ret;
+
+ 	ret = nt35510_send_long(nt, dsi, NT35510_P1_SETVCL,
+ 				NT35510_P1_VCL_LEN,
+ 				nt->conf->vcl);
+ 	if (ret)
+ 		return ret;
+
+ 	ret = nt35510_send_long(nt, dsi, NT35510_P1_BT3CTR,
+ 				NT35510_P1_BT3CTR_LEN,
+ 				nt->conf->bt3ctr);
+ 	if (ret)
+ 		return ret;
+
+ 	ret = nt35510_send_long(nt, dsi, NT35510_P1_SETVGH,
+ 				NT35510_P1_VGH_LEN,
+ 				nt->conf->vgh);
+@@ -721,11 +725,13 @@ static int nt35510_setup_power(struct nt35510 *nt)
+ 	if (ret)
+ 		return ret;
+ 
+-	ret = nt35510_send_long(nt, dsi, NT35510_P1_SETVCMOFF,
+-				NT35510_P1_VCMOFF_LEN,
+-				nt->conf->vcmoff);
+-	if (ret)
+-		return ret;
+	if (nt->conf->cmds & NT35510_CMD_SETVCMOFF) {
+		ret = nt35510_send_long(nt, dsi, NT35510_P1_SETVCMOFF,
+					NT35510_P1_VCMOFF_LEN,
+					nt->conf->vcmoff);
+		if (ret)
+			return ret;
+	}
+ 
+ 	/* Typically 10 ms */
+ 	usleep_range(10000, 20000);
+@@ -1319,7 +1325,7 @@ static const struct nt35510_config nt35510_frida_frd400b25025 = {
+ 	},
+ 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+ 			MIPI_DSI_MODE_LPM,
+-	.cmds = NT35510_CMD_CONTROL_DISPLAY,
+	.cmds = NT35510_CMD_CONTROL_DISPLAY | NT35510_CMD_SETVCMOFF,
+ 	/* 0x03: AVDD = 6.2V */
+ 	.avdd = { 0x03, 0x03, 0x03 },
+ 	/* 0x46: PCK = 2 x Hsync, BTP = 2.5 x VDDB */
+
+---
+base-commit: 8400291e289ee6b2bf9779ff1c83a291501f017b
+change-id: 20240906-fix-nt35510-a8ec6e47e036
+
+Best regards,
+-- 
+Linus Walleij <linus.walleij@linaro.org>
+
+